At Relative Dynamics we value knowledge as a process rather than knowledge as an answer. Founded in 2011 our goal is to define the new space era by continuously pushing the boundaries of engineering models services and technology development. Visit us at www.relativedynamicsinc.com.

Relative Dynamics Inc. is looking for an FPGA Engineer who will be responsible for the architecture and development of programmable logic functions utilizing FPGA devices. Designs include signal processing algorithms to support software defined radio functionality data communication with peripheral devices and other capabilities as required. This position requires a background in digital signal processing (DSP) and communication theory.

What You'll Get to Do:

• Participate in the design development integration and testing of hardware/software to go into our DSP baseline.
• Leverage education and on the job programming skills in VHDL, C/C++, and Python for development activities
• Participate in the definition of requirements CONOPs and architecture for future systems
• Help with Receiver architectures Software channelization Modulation/demodulation Spectral analysis activities
• Use knowledge and understanding of radio frequency (RF) systems and test equipment (spectrum analyzer network analyzer signal generator etc.) in support of projects and Senior Technical staff activities.
• Help with link budgets range estimates and system sensitivity assessments
• Support field testing of the equipment being developed
• Use computer-assisted engineering and design software and equipment to perform engineering tasks.
• Architect and implement FPGA solutions for wideband signal collection and processing system.
• Develop architectural approaches to enable future adaptation of FPGA signal processing solutions to new signal type.
• Reverse engineer existing RF signal processing solutions.

What You'll Need:

• Master's Degree or PhD preferred
• Experience using MatLab Python or other scientific programming languages modeling and simulating Digital Signal Processing algorithms
• Experience developing and implementing Digital Signal Processing algorithms in FPGAs preferably Xilinx using VHDL and or Verilog
• Programming skills and experience in C C++ or Python
• Thorough understanding of software defined radio systems:
• Receiver architectures
• Software channelization
• Modulation/demodulation techniques
• Experience with Matlab filter design
• Ability to evaluate technical trade-offs
• Working familiarity with radio frequency (RF) systems and test equipment (spectrum analyzer network analyzer signal generator etc.)
• Ability and willingness to learn new skills and to work across domains (HW/SW System Test) when necessary
• Exposure to all phases of product development (concept design implementation test and production)
• Self-starter with good interpersonal and written/verbal communication skills

What You Won't Do:

• Feel stuck as we offer great opportunities to advance and learn
• Feel like a number as we're a close-knit bunch and always have each other’s backs

Who You Are:

• A self-starter who thrives in a fast-paced environment
• A quick learner who is always ready to gain depth of knowledge
• A reliable worker who knows the importance of showing up when it counts
• Accept assignments with open cooperative positive and team-oriented attitudes
• Able to plan and execute plans across teams
• Effective communicator both written and verbal

What You'll Enjoy:

• Competitive wage and benefits package
• Medical, dental, vision and life/disability insurance
• Vacation and paid holidays
• Tuition reimbursement
• Great 401k with company match
• Employee referral program
• Community involvement investing and giving back to the community

Relative Dynamics conducts a comprehensive background check that includes drug testing. We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, national origin, gender identity, sexual orientation, age, marital status, veteran status or disability status.